1. Field of the Invention
The present invention relates to a method for adjusting clock frequency of a processing unit of a computer system and related device, and more particularly, to a method for adjusting clock frequency of a central processing unit of a computer system to reduce peak power consumption of the computer system and related device.
2. Description of the Prior Art
A portable computer system, such as a laptop, a mobile phone or a portable wireless access point, uses a battery as a main power source. To improve power consumption efficiency, conventional power saving technologies such as clock gating and dynamic voltage and frequency scaling (DVFS) are widely used in various kinds of computer systems. Clock gating is using logic gates to control a clock circuit of a computer system to turn off operation of parts of the clock circuit when they are not necessary, for reducing power consumption. Dynamic voltage and frequency scaling is to estimate loading of a central processing unit (CPU) of a computer system by detecting changes of related signals to adjust the clock frequency and the operating voltage of the CPU accordingly, for reducing power consumption. Note that, these conventional power saving technologies aims to reduce average power consumption, especially when the computer system is in an idle/standby state.
The ideal battery capacity is normally measured under specific ideal conditions. However, in reality, the total battery power used by the computer system depends on many factors such as discharge current, temperature, humidity, etc, and may not be equal to the ideal battery capacity. For example, a battery of the rated capacity 1000 mAH can be continuously discharged for two hours by a discharge current 0.5 C (500 mA) to output a total power approximate to 100% battery capacity; however, the same battery can merely be discharged for less than one hour by a discharge current 1 C (1000 mA) to output a total power approximate to 80% battery capacity at most. When a battery is discharged or charged by a large current for a long time, the battery capacity is not able to be sufficiently utilized, and moreover, battery life will be reduced.
FIG. 1 is a timing diagram of power consumption of a conventional computer system, in which the computer system includes at least a central processing unit (CPU) and a peripheral unit. FIG. 1 illustrates that the total power consumption of the computer system (depicted in a bold dashed line) approximates to the sum of power consumption of the CPU (depicted in a solid line) and power consumption of the peripheral unit (depicted in a normal dashed line). As shown in FIG. 1, average power consumption of the CPU or the peripheral unit is normal in most of time; however, peak power consumption of the CPU and peak power consumption of the peripheral unit take place at almost the same time. At that time, peak power consumption of the computer system is quite large and a battery of the computer system is discharged by a huge current, and as a result, the total usable battery power and even the battery life may be decreased.
It is inevitable that usable battery power or battery life is decreased since the conventional power saving technologies can only reduce average power consumption and cannot effectively reduce peak power consumption of each unit on the computer system. Therefore, to use battery power efficiently and maintain battery life as long as possible is important for a portable computer system.